Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/2576
Title: Generalized disjunction decomposition for the evolution of programmable logic array structures
Authors: Stomeo, E
Kalganova, T
Lambert, C
Issue Date: 2006
Publisher: IEEE
Citation: 1st NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2006). Istanbul, Turkey, June 15–18, 2006. pp. 179 - 185
Abstract: Evolvable hardware refers to a self reconfigurable electronic circuit, where the circuit configuration is under the control of an evolutionary algorithm. Evolvable hardware has shown one of its main deficiencies, when applied to solving real world applications, to be scalability. In the past few years several techniques have been proposed to avoid and/or solve this problem. Generalized disjunction decomposition (GDD) is one of these proposed methods. GDD was successful for the evolution of large combinational logic circuits based on a FPGA structure when used together with bi-directional incremental evolution and with (1+ë) evolution strategy. In this paper a modified generalized disjunction decomposition, together with a recently introduced multi-population genetic algorithm, are implemented and tested for its scalability for solving large combinational logic circuits based on Programmable Logic Array (PLA) structures.
URI: http://bura.brunel.ac.uk/handle/2438/2576
DOI: http://dx.doi.org/10.1109/AHS.2006.47
ISBN: 0-7695-2614-4
Appears in Collections:Electronic and Computer Engineering
Dept of Electronic and Computer Engineering Research Papers



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