Brunel University Research Archive (BURA) >
Schools >
School of Engineering and Design >
School of Engineering and Design Research papers >

Please use this identifier to cite or link to this item:

Title: Parallelised max-log-MAP model
Authors: Loo, K K
Keywords: Turbo code
Publication Date: 2002
Publisher: IEEE
Citation: Electronics Letters 38(17): 971-972, Aug 2002
Abstract: A paralleliscd max-Log-MAP model (P-max-Log-MAP) that exploits the sub-word parallelism and very long instruction word architccture of a microprocessor or a digital signal processor (DSP) is presented. The proposed model rcduccs considerably thc computational complexity of the max-Log-MAP algorithm; valid therefore facilitates easy implementation.
ISSN: 0013-5194
Appears in Collections:School of Engineering and Design Research papers
Electronic and Computer Engineering

Files in This Item:

File Description SizeFormat
J32.pdf243.93 kBAdobe PDFView/Open

Items in BURA are protected by copyright, with all rights reserved, unless otherwise indicated.


Library (c) Brunel University.    Powered By: DSpace
Send us your
Feedback. Last Updated: September 14, 2010.
Managed by:
Hassan Bhuiyan