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Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/6008

Title: Accelerated hardware video object segmentation: From foreground detection to connected components labelling
Authors: Appiah, K
Hunter, A
Dickinson, P
Meng, H
Keywords: Background differencing
Image segmentation
Connected component labelling
Object extraction
FPGA
Publication Date: 2010
Publisher: Elsevier
Citation: Computer Vision and Image Understanding, 114(11): 1282-1291, Nov 2010
Abstract: This paper demonstrates the use of a single-chip FPGA for the segmentation of moving objects in a video sequence. The system maintains highly accurate background models, and integrates the detection of foreground pixels with the labelling of objects using a connected components algorithm. The background models are based on 24-bit RGB values and 8-bit gray scale intensity values. A multimodal background differencing algorithm is presented, using a single FPGA chip and four blocks of RAM. The real-time connected component labelling algorithm, also designed for FPGA implementation, run-length encodes the output of the background subtraction, and performs connected component analysis on this representation. The run-length encoding, together with other parts of the algorithm, is performed in parallel; sequential operations are minimized as the number of run-lengths are typically less than the number of pixels. The two algorithms are pipelined together for maximum efficiency.
Description: This is the preprint version of the Article - Copyright @ 2010 Elsevier
URI: http://www.sciencedirect.com/science/article/B6WCX-4YX002K-2/2/340a3e3970a577f22787ba65a36e341d
http://bura.brunel.ac.uk/handle/2438/6008
DOI: http://dx.doi.org/10.1016/j.cviu.2010.03.021
ISSN: 1077-3142
Appears in Collections:School of Engineering and Design Research papers
Electronic and Computer Engineering
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