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http://bura.brunel.ac.uk/handle/2438/7190
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DC Field | Value | Language |
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dc.contributor.author | Appiah, K | - |
dc.contributor.author | Hunter, A | - |
dc.contributor.author | Dickinson, P | - |
dc.contributor.author | Meng, H | - |
dc.date.accessioned | 2013-01-28T16:34:31Z | - |
dc.date.available | 2013-01-28T16:34:31Z | - |
dc.date.issued | 2012 | - |
dc.identifier.citation | IEEE Transactions on Circuits and Systems for Video Technology, 22(8): 1150 - 1160, Aug 2012 | en_US |
dc.identifier.issn | 1051-8215 | - |
dc.identifier.uri | http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6193165&tag=1 | en |
dc.identifier.uri | http://bura.brunel.ac.uk/handle/2438/7190 | - |
dc.description | This is the post-print version of the Article. The official published version can be accessed from the link below - Copyright @ 2012 IEEE | en_US |
dc.description.abstract | This paper introduces a tri-state logic self-organizing map (bSOM) designed and implemented on a field programmable gate array (FPGA) chip. The bSOM takes binary inputs and maintains tri-state weights. A novel training rule is presented. The bSOM is well suited to FPGA implementation, trains quicker than the original self-organizing map (SOM), and can be used in clustering and classification problems with binary input data. Two practical applications, character recognition and appearance-based object identification, are used to illustrate the performance of the implementation. The appearance-based object identification forms part of an end-to-end surveillance system implemented wholly on FPGA. In both applications, binary signatures extracted from the objects are processed by the bSOM. The system performance is compared with a traditional SOM with real-valued weights and a strictly binary weighted SOM. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE | en_US |
dc.subject | Binary SOM | en_US |
dc.subject | FPGA | en_US |
dc.subject | Object recognition | en_US |
dc.subject | Character recognition | en_US |
dc.title | Implementation and applications of tri-state self organising maps on FPGA | en_US |
dc.type | Article | en_US |
dc.identifier.doi | http://dx.doi.org/10.1109/TCSVT.2012.2197077 | - |
pubs.organisational-data | /Brunel | - |
pubs.organisational-data | /Brunel/Brunel Active Staff | - |
pubs.organisational-data | /Brunel/Brunel Active Staff/School of Engineering & Design | - |
pubs.organisational-data | /Brunel/Brunel Active Staff/School of Engineering & Design/Electronic and Computer Engineering | - |
Appears in Collections: | Electronic and Electrical Engineering Publications |
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Fulltext.pdf | 497.4 kB | Adobe PDF | View/Open |
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