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Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/4074

Title: Generating a checking sequence with a minimum number of reset transitions
Authors: Hierons, RM
Ural, H
Keywords: Finite state machine
Checking sequence generation
Reset transition
Distinguishing sequence
Optimisation
Publication Date: 2010
Publisher: Springer
Citation: Automated Software Engineering 17(3): 217-250, Sep 2010
Abstract: Given a finite state machine M, a checking sequence is an input sequence that is guaranteed to lead to a failure if the implementation under test is faulty and has no more states than M. There has been much interest in the automated generation of a short checking sequence from a finite state machine. However, such sequences can contain reset transitions whose use can adversely affect both the cost of applying the checking sequence and the effectiveness of the checking sequence. Thus, we sometimes want a checking sequence with a minimum number of reset transitions rather than a shortest checking sequence. This paper describes a new algorithm for generating a checking sequence, based on a distinguishing sequence, that minimises the number of reset transitions used.
Sponsorship: This work was supported in part by Leverhulme Trust grant number F/00275/D, Testing State Based Systems, Natural Sciences and Engineering Research Council (NSERC) of Canada grant number RGPIN 976, and Engineering and Physical Sciences Research Council grant number GR/R43150, Formal Methods and Testing (FORTEST).
URI: http://bura.brunel.ac.uk/handle/2438/4074
DOI: http://dx.doi.org/10.1007/s10515-009-0061-0
ISSN: 0928-8910
Appears in Collections:B-SERC Research Papers
School of Information Systems, Computing and Mathematics Research Papers
Computer Science

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