Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/16833
Title: An FPGA-based track finder for the L1 trigger of the CMS experiment at the HL-LHC
Authors: Cieri, D
Calligaris, L
Harder, K
Manolopoulos, K
Shepherd-Themistocleous, C
Tomalin, I
Aggleton, R
Ball, F
Brooke, J
Clement, E
Newbold, D
Paramesvaran, S
Hobson, P
Morton, A
Reid, I
Vichoudis, P
Hall, G
Iles, G
James, T
Matsushita, T
Pesaresi, M
Rose, A
Shtipliyski, A
Summers, S
Tapper, A
Uchida, K
Ardila-Perez, L
Balzer, M
Caselle, M
Sander, O
Schuh, T
Weber, M
Issue Date: 2017
Citation: Proceedings of Science, 2017, 2017-September
Abstract: A new tracking detector is under development for use by the CMS experiment at the High-Luminosity LHC (HL-LHC). A crucial component of this upgrade will be the ability to reconstruct within a few microseconds all charged particle tracks with transverse momentum above 3 GeV, so they can be used in the Level-1 trigger decision. A concept for an FPGA-based track finder using a fully time-multiplexed architecture is presented, where track candidates are reconstructed using a projective binning algorithm based on the Hough Transform followed by a track fitting based on the linear regression technique. A hardware demonstrator using MP7 processing boards has been assembled to prove the entire system, from the output of the tracker readout boards to the reconstruction of tracks with fitted helix parameters. It successfully operates on one eighth of the tracker solid angle at a time, processing events taken at 40 MHz, each with up to 200 superimposed proton-proton interactions, whilst satisfying latency constraints. The demonstrated track-reconstruction system, the chosen architecture, the achievements to date and future options for such a system will be discussed.
URI: http://bura.brunel.ac.uk/handle/2438/16833
ISSN: 1824-8039
Appears in Collections:Dept of Electronic and Computer Engineering Research Papers

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