Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/33328
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dc.contributor.authorZeyuan, L-
dc.contributor.authorYan, W-
dc.contributor.authorGan, L-
dc.contributor.authorLi, G-
dc.contributor.authorHongqing, L-
dc.date.accessioned2026-05-22T09:32:13Z-
dc.date.available2026-05-22T09:32:13Z-
dc.date.issued2026-05-18-
dc.identifierORCiD: Zeyuan Li https://orcid.org/0009-0008-4294-5834-
dc.identifierORCiD: Wenyi Yan https://orcid.org/0009-0006-3018-4113-
dc.identifierORCiD: Lu Gan https://orcid.org/0000-0003-1056-7660-
dc.identifierORCiD: Guoquan Li https://orcid.org/0000-0001-8022-743X-
dc.identifierORCiD: Hongqing Liu https://orcid.org/0000-0002-2069-0390-
dc.identifier.citationZeyuan, L. et al. (2026) 'An FPGA-Calibrated Modulo ADC for High-Dynamic-Range Signal Acquisition', IEEE Open Journal of Circuits and Systems, 0 (early access), pp. 1–12. doi: 10.1109/OJCAS.2026.3694303.en-US
dc.identifier.urihttps://bura.brunel.ac.uk/handle/2438/33328-
dc.description.abstractConventional analog-to-digital converters (ADCs) suffer from irreversible clipping when input amplitudes exceed their fixed full-scale range. Modulo ADCs address this by folding the input signal prior to quantization; however, stable hardware operation under deep-folding conditions and experimental validation of algorithmic recoverability remain outstanding challenges. This paper presents a calibrated FPGA-based modulo ADC platform in which a finite state machine with multi-bit update control governs folding dynamics, replacing instantaneous comparator-triggered feedback to ensure deterministic and stable operation. A controlled under-compensation calibration strategy converts fold-dependent threshold mismatch and oscillatory instability into a bounded constant residual, enabling reliable folding at high folding depths. The platform achieves a dynamic range expansion exceeding two orders of magnitude while maintaining signal fidelity comparable to that of the standalone ADC. Experimental validation across diverse waveforms confirms robust signal acquisition and demonstrates the practical feasibility of dynamic-range extension using modulo sampling principles.en-US
dc.format.extentpp. 1–12-
dc.format.mediumElectronic-
dc.languageEnglishen-US
dc.language.isoengen-US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en-US
dc.rightsCreative Commons Attribution 4.0 License-
dc.rights.urihttps://creativecommons.org/licenses/by/4.0/-
dc.subjectanalog-to-digital converters (ADCs)en-US
dc.subjectmodulo samplingen-US
dc.subjectsampling methodsen-US
dc.subjectsignal reconstructionen-US
dc.subjectfield-programmable gate array (FPGA) implementationen-US
dc.titleAn FPGA-Calibrated Modulo ADC for High-Dynamic-Range Signal Acquisitionen-US
dc.typeArticleen-US
dc.date.dateAccepted2026-05-10-
dc.identifier.doihttps://doi.org/10.1109/OJCAS.2026.3694303-
dc.relation.isPartOfIEEE Open Journal of Circuits and Systems-
pubs.issue0-
pubs.publication-statusPublished online-
pubs.volume00-
dc.identifier.eissn2644-1225-
dc.rights.licensehttps://creativecommons.org/licenses/by/4.0/legalcode.en-
dcterms.dateAccepted2026-05-10-
dc.rights.holderThe Author(s)-
dc.contributor.orcidLi, Zeyuan [0009-0008-4294-5834]-
dc.contributor.orcidYan, Wenyi [0009-0006-3018-4113]-
dc.contributor.orcidGan, Lu [0000-0003-1056-7660]-
dc.contributor.orcidLi, Guoquan [0000-0001-8022-743X]-
dc.contributor.orcidLiu, Hongqing [0000-0002-2069-0390]-
Appears in Collections:Department of Electronic and Electrical Engineering Research Papers

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