On-Board Two-Channel Modulo ADC System with Folding and Reconstruction

Abstract

This paper presents an FPGA-based real-time implementation of the robust Chinese remainder theorem (RCRT) for signal reconstruction in two-channel modulo analog-to-digital converters (ADCs) systems. A hardware-oriented formulation of the RCRT algorithm is developed, removing modular inversion to enable a fully deterministic reconstruction pipeline under practical hardware constraints, suitable for FPGA deployment. Building on this formulation, we realise a fully hardwarebased Modulo ADC system that performs both signal folding and reconstruction on the same board, without any software involvement. The proposed design achieves accurate real-time signal recovery, demonstrating the feasibility and efficiency of RCRT-based architectures for wide-dynamic-range acquisition in hardware-limited sampling and quantization scenarios.