Combinational multiple-valued circuit design by generalised disjunctive decomposition

Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/2513

Full metadata record

DC Field	Value	Language
dc.contributor.author	Kalganova, T	-
dc.coverage.spatial	6	en
dc.date.accessioned	2008-07-21T14:09:14Z	-
dc.date.available	2008-07-21T14:09:14Z	-
dc.date.issued	1997	-
dc.identifier.citation	Proceeding of the European Conference on Circuit Theory and Design, ECCTD'97, Budapest, Hungary, 1997. Vol.2. pp. 695-700	en
dc.identifier.uri	http://bura.brunel.ac.uk/handle/2438/2513	-
dc.description.abstract	A design of multiple-valued circuits based on the multiple-valued programmable logic arrays (MV PLA’s) by generalized disjunctive decomposition is presented. Main subjects are 1) Generalized disjunctive decomposition of multiple-valued functions using multiple-terminal multiplevalued decision diagrams (MTMDD’s); 2) Realization of functions by MV PLA-based combinatorial circuits.	en
dc.format.extent	605627 bytes	-
dc.format.mimetype	application/pdf	-
dc.language.iso	en	-
dc.publisher	ECCTD'97 committees	en
dc.subject	Multiple-valued logic	en
dc.subject	Generalized disjunctive decomposition	en
dc.subject	Combinational multiple-valued circuits (MV circuits)	en
dc.title	Combinational multiple-valued circuit design by generalised disjunctive decomposition	en
dc.type	Conference Paper	en
Appears in Collections:	Electronic and Electrical Engineering Dept of Electronic and Electrical Engineering Research Papers

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