Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/2563
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dc.contributor.authorStomeo, E-
dc.contributor.authorKalganova, T-
dc.coverage.spatial6en
dc.date.accessioned2008-08-01T14:47:27Z-
dc.date.available2008-08-01T14:47:27Z-
dc.date.issued2004-
dc.identifier.citationProceedings of the 5th International Conference on Recent Advances in Soft Computing, Nottingham, United Kingdom December 2004. pp. 466 - 471en
dc.identifier.isbn0-7803-8643-4-
dc.identifier.urihttp://bura.brunel.ac.uk/handle/2438/2563-
dc.description.abstractThis paper describes a new type of decomposition strategy for Evolvable Hardware, which tackles the problem of scalability. Several logic circuits from the MCNC benchmark have been evolved and compared with other Evolvable Hardware techniques. The results demonstrate that the proposed method improves the evolution of logic circuits in terms of time and fitness function in comparison with BIE and standard EHW.en
dc.format.extent1030426 bytes-
dc.format.mimetypeapplication/pdf-
dc.language.isoen-
dc.publisherIEEEen
dc.subjectEvolvable hardwareen
dc.subjectEvolutionary computationen
dc.subjectLogic designen
dc.subjectProblem decompositionen
dc.titleImproving EHW performance introducing a new decomposition strategyen
dc.typeConference Paperen
dc.identifier.doihttp://dx.doi.org/10.1109/ICCIS.2004.1460455-
Appears in Collections:Electronic and Electrical Engineering
Dept of Electronic and Electrical Engineering Research Papers

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