Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/4879
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dc.contributor.authorZobaa, AF-
dc.date.accessioned2011-03-25T11:20:36Z-
dc.date.available2011-03-25T11:20:36Z-
dc.date.issued2003-
dc.identifier.citationIEEE Transactions on Power Delivery, 18(4): 1562-1563, Oct 2003en_US
dc.identifier.issn0885-8977-
dc.identifier.urihttp://bura.brunel.ac.uk/handle/2438/4879-
dc.descriptionThis material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of Brunel University's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. Copyright @ 2003 IEEEen_US
dc.description.abstractThis letter presents a proposed method for finding the optimum fixed compensating capacitor to minimize the voltage harmonic distortion at a load bus while holding the power factor at a desired value and constraining the nameplate kiloVAr of the compensating capacitor, its rated voltage RMS, and its rated current RMS as constraints according to IEEE Std. 18-1992. Also, the values of the compensating capacitor, which would create resonant conditions, would be omitted from the solution. Finally, the contribution of the newly developed method is demonstrated in an example taken from previous publications.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectHarmonicsen_US
dc.subjectPower factoren_US
dc.subjectPower qualityen_US
dc.titleCapacitive compensation at nonsinsoidal buses based on IEEE Std. 18-1992en_US
dc.typeResearch Paperen_US
dc.identifier.doihttp://dx.doi.org/10.1109/TPWRD.2003.817532 -
Appears in Collections:Electronic and Computer Engineering
Dept of Electronic and Computer Engineering Research Papers

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