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|Title:||Transient analysis and synthesis of linear circuits using constraint logic programming|
|Citation:||Proceedings of INAP-96: The 9th Symposium and Exhibition on Industrial Applications of Prolog, Tokyo, Japan, 16-19 October 1996.|
|Abstract:||In this paper describes the design of a transient analysis program for linear circuits and its implementation in a Constraint Logic Programming language, CLP(R). The transient analysis program parses the input circuit description into a network graph, analyses its semantic correctness and then performs the transient analysis. The test results show that the program is at least 97% accurate when run at two decimal places. We have also compared the performance of our program with a commercial package implemented in an imperative language. The advantages of implementing the analysis program in a CLP language include: quick construction and ease of maintenance. We also report on the synthesis of generation of a circuit with given transient characteristics.|
|Appears in Collections:||Computer Science|
Dept of Computer Science Research Papers
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