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http://bura.brunel.ac.uk/handle/2438/7190| Title: | Implementation and applications of tri-state self organising maps on FPGA |
| Authors: | Appiah, K Hunter, A Dickinson, P Meng, H |
| Keywords: | Binary SOM;FPGA;Object recognition;Character recognition |
| Issue Date: | 2012 |
| Publisher: | IEEE |
| Citation: | IEEE Transactions on Circuits and Systems for Video Technology, 22(8): 1150 - 1160, Aug 2012 |
| Abstract: | This paper introduces a tri-state logic self-organizing map (bSOM) designed and implemented on a field programmable gate array (FPGA) chip. The bSOM takes binary inputs and maintains tri-state weights. A novel training rule is presented. The bSOM is well suited to FPGA implementation, trains quicker than the original self-organizing map (SOM), and can be used in clustering and classification problems with binary input data. Two practical applications, character recognition and appearance-based object identification, are used to illustrate the performance of the implementation. The appearance-based object identification forms part of an end-to-end surveillance system implemented wholly on FPGA. In both applications, binary signatures extracted from the objects are processed by the bSOM. The system performance is compared with a traditional SOM with real-valued weights and a strictly binary weighted SOM. |
| Description: | This is the post-print version of the Article. The official published version can be accessed from the link below - Copyright @ 2012 IEEE |
| URI: | http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6193165&tag=1 http://bura.brunel.ac.uk/handle/2438/7190 |
| DOI: | http://dx.doi.org/10.1109/TCSVT.2012.2197077 |
| ISSN: | 1051-8215 |
| Appears in Collections: | Electronic and Electrical Engineering Publications |
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|---|---|---|---|---|
| Fulltext.pdf | 497.4 kB | Adobe PDF | View/Open |
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