Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/32055
Title: Vendor-Independent Design Space Exploration and Resource Optimisation Framework for 3D Networks-on-Chip Using Hypergraph-Genetic Algorithm Integration
Authors: Al-Alousi, A
Li, M
Meng, H
Keywords: 3D Networks-on-Chip;design space;exploration;genetic algorithms;hypergraph theory;resource optimisation;System-on-Chip
Issue Date: 2025
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Citation: Al-Alousi, A., Li, M. and Meng, H. (2025) 'Vendor-Independent Design Space Exploration and Resource Optimisation Framework for 3D Networks-on-Chip Using Hypergraph-Genetic Algorithm Integration', IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems, 0 (accepted, in press)
Abstract: ...
Description: An e-print version of the article is available at https://www.techrxiv.org/doi/full/10.36227/techrxiv.173198800.09799079 under a CC BY license. e-Prints posted on TechRxiv are preliminary reports that are not peer reviewed. They should not be regarded as conclusive, guide clinical practice/health-related behavior, or be reported in the media as established information.
URI: https://bura.brunel.ac.uk/handle/2438/32055
ISSN: 0278-0070
Other Identifiers: ORCiD: Maozhen Li https://orcid.org/0000-0002-0820-5487
ORCiD: Hongying Meng https://orcid.org/0000-0002-8836-1382
Appears in Collections:Dept of Electronic and Electrical Engineering Embargoed Research Papers

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